Neuromorphic Systems And Algorithms
Neuromorphic VLSI Systems
This research theme concentrates on the development of computational models and implementing them using analog/digital VLSI circuits or FPGA for building real-time distributed neural processing systems.
Novel Learning Algorithms for Neuromorphic Chips
Neuromorphic systems are based on the mechanisms of adaptation and learning, and are modeled after the plasticity of synapses and neural structures in biological systems. We explore various supervised and unsupervised learning algorithms (including event-based learning) optimized for implementation on hardware, on either analog or digital chips (or FPGA). We will test these learning algorithms on our general-purpose neuromorphic simulators such as the IFAT.
Neuromorphic Sensors and their Applications
In this research theme, we explore neuromorphic sensors (currently, vision and auditory modalities) to build various intelligent systems that could be used for various robotics and military applications. Neuromorphic silicon retinas aim to mimic the features of biological retinas to sense and process the visual world. Examples of such silicon retinas are the Asynchronous Time-based Imaging Sensor (ATIS) and the Dynamic Vision Sensor (DVS). In-house, we have developed an electronic model of the cochlea, which has been used for various auditory processing and machine hearing tasks such as to solve cocktail party problem in real time.
NeuroElectronic Hybrid System
This project aims to integrate biological neurons, developed using in vitro culture, with silicon neuronal circuits for machine learning tasks. This will pave the way to build a brain-machine interface, where our NeuroElectronic hybrid system could be directly interfaced to the nervous tissue and could communicate with the nervous system in its native “language” (i.e., spikes), with very low power constraints.
Hardware Accelerators for Machine Learning
The proposed research aims to make battery-powered mobile devices as powerful as supercomputers for pattern recognition tasks. To achieve this aim, we will build a massively parallel low-power neuromorphic coprocessor, specifically designed to implement deep learning neural networks. The coprocessor will be developed as an open-source design run on commercially available Field Programmable Gate Arrays (FPGAs), so that it will be available to thousands of research groups worldwide. This coprocessor will be developed using the standard Application Specified Integrated Circuit (ASIC) design flow, such that they can be seamlessly integrated into existing processors or manufactured on dedicated ICs using state-of-the-art manufacturing technologies for the best performance per watt.
Machine Learning for IoT/Edge Computing
IoT or Edge devices have to be active at all times to ensure that it can detect events of interest. In most cases, the events of interest are infrequent or are rare, as a result most of these IoT systems integrate a pattern classifier to filter out false-positive events and hence in the process relax the communication requirements. Edge computing focuses on data processing at the source, leading to lower bandwidth requirement, more personal data integrity and lower latency for real-time operations, but with stringent power and area constraints. In this research area, we develop ultra-light machine learning algorithms and implement them on analog/digital ASIC or on FPGA. Such systems can be used to implement always-on smart wake-up modules to perform wake up operation only when voice command or certain event is detected.
This research aims to develop circuits and systems for biomedical applications. This work will be conducted in close collaboration with clinicians. We are also interested in developing the EEG based Brain-computer interface system for neurorehabilitation.