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ARYABHAT: Introduction:

ARYABHAT-1 is a next-generation analog computing chipset designed to target Artificial-Intelligence (AI) and Machine Learning (ML) applications at the edge. Presently, such computations are achieved by application-specific digital accelerators, which utilize spatial arrays of parallel processing elements to significantly improve performance and energy efficiency compared to general-purpose platforms. This work focuses on building the first-of-its-kind technology scalable reconfigurable analog processor that can be fully scaled down to sub-nanometer process nodes.

Demo: 

 Paper references:

1. P. Kumar, A. Nandi, S. Chakrabartty and C. S. Thakur, “Process, Bias, and Temperature Scalable CMOS Analog Computing Circuits for Machine Learning,” in IEEE Transactions on Circuits and Systems I: Regular Papers, 2022

2. P. Kumar, A. Nandi, S. Chakrabartty and C. S. Thakur, “Bias-Scalable Near-Memory CMOS Analog Processor for Machine Learning,” in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, doi: 10.1109/JETCAS.2023.3234570.

3. Gu, M. and Chakrabartty, S., 2011. Synthesis of bias-scalable CMOS analog computational circuits using margin propagation. IEEE TCAS I: Regular Papers, 59(2), pp.243-254.

For more details, please click here.

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