Overview
Our research has led to the development of several hardware accelerators designed for edge AI applications. Two notable accelerators include:
Aryabhat: A general-purpose field-programmable analog neural array, Aryabhat is engineered for low-power edge AI applications. It offers flexibility and efficiency, making it ideal for a wide range of tasks.
RAMAN Accelerator: This versatile accelerator has been utilized in various applications, including Brain-Computer Interfaces (BCI), acoustic processing, and vision systems. The RAMAN accelerator has demonstrated its capabilities through FPGA prototypes, showcasing its potential in real-world scenarios.
Demo Videos: RAMAN Accelerator
The RAMAN Accelerator has been deployed in several real-world applications demonstrating its capabilities across domains such as Brain-Computer Interfaces (BCIs), audio event detection, and low-power vision processing. The videos below showcase two key prototype demonstrations:
- Demo 1: End-to-end real-time acoustic inference using the RAMAN accelerator implemented on FPGA. This system performs low-latency sound classification for edge devices.
- Demo 2: FPGA-based vision system using RAMAN to detect patterns and features in camera input streams under constrained power and memory budgets.
These demos highlight the flexibility and performance of RAMAN in supporting diverse edge AI workloads, even on resource-limited hardware platforms.
Selected Publications
- Krishna, A., Nudurupati, S. R., Chandana, D. G., Dwivedi, P., van Schaik, A., Mehendale, M., & Thakur, C. S. (2024). Raman: A re-configurable and sparse tinyML accelerator for inference on edge. IEEE Internet of Things Journal.
- Kumar, P., Nandi, A., Chakrabartty, S., & Thakur, C. S. (2023). Bias-scalable near-memory CMOS analog processor for machine learning. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 13(1), 312-322.
- Kumar, P., Nandi, A., Chakrabartty, S., & Thakur, C. S. (2022). Process, bias, and temperature scalable CMOS analog computing circuits for machine learning. IEEE Transactions on Circuits and Systems I: Regular Papers, 70(1), 128-141.
- Kumar, P., Nandi, A., Saha, A., Teja, K. S. P., Das, R., Chakrabartty, S., & Thakur, C. S. (2024). Aryabhat: A digital-like field programmable analog computing array for edge ai. IEEE Transactions on Circuits and Systems I: Regular Papers, 71(5), 2252-2265.