GPIO – Lock the configurations of the NMI and JTAG-SWD pins on the GPIO
Optionally, you can lock the configurations of the NMI and JTAG/SWD pins on the GPIO port pins by setting the LOCK bits in the GPIOLOCK register.
Bit/Field | Name | Description |
---|---|---|
31:0 | LOCK | GPIO Lock A write of the value 0x4C4F.434B unlocks the GPIO Commit (GPIOCR) register for write access. A write of any other value or a write to the GPIOCR register reapplies the lock, preventing any register updates. A read of this register returns the following values: 0x1: The GPIOCR register is locked and may not be modified. 0x0: The GPIOCR register is unlocked and may be modified. |
Recent Comments